Index of /archive/邏設實驗/110李濬屹/Lab 4/

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visio/                                             21-Mar-2026 11:06       -
Lab 4 Finite State Machines.pdf                    21-Mar-2026 11:06      1M
Lab4_Team30_Built_In_Self_Test.v                   21-Mar-2026 11:06    1272
Lab4_Team30_Built_In_Self_Test_t.v                 21-Mar-2026 11:06    1063
Lab4_Team30_Content_Addressable_Memory.v           21-Mar-2026 11:06    3482
Lab4_Team30_Content_Addressable_Memory_t.v         21-Mar-2026 11:06    3287
Lab4_Team30_Mealy_Sequence_Detector.v              21-Mar-2026 11:06    1905
Lab4_Team30_Mealy_Sequence_Detector_t.v            21-Mar-2026 11:06     873
Lab4_Team30_Report.docx                            21-Mar-2026 11:06      4M
Lab4_Team30_Report.pdf                             21-Mar-2026 11:06      1M
Lab4_Team30_Report_FPGA.docx                       21-Mar-2026 11:06      3M
Lab4_Team30_Report_FPGA.pdf                        21-Mar-2026 11:06    543K
Lab4_Team30_Scan_Chain_Design.v                    21-Mar-2026 11:06     654
Lab4_Team30_Scan_Chain_Design_t.v                  21-Mar-2026 11:06    1493
Q4_block_diagram.png                               21-Mar-2026 11:06     22K
Q4_sequence_detector.png                           21-Mar-2026 11:06     14K
Q4_state_diagram.png                               21-Mar-2026 11:06     73K
basic_state_diagram.png                            21-Mar-2026 11:06     41K
fpga_1a2b.png                                      21-Mar-2026 11:06     67K
fpga_lfsr.png                                      21-Mar-2026 11:06     64K
fpga_seven_segment.png                             21-Mar-2026 11:06     32K
fpga_state_diagram.png                             21-Mar-2026 11:06     29K