| downcounter Project Status (03/26/2016 - 17:17:50) | |||
| Project File: | Stop_Watch.xise | Parser Errors: | No Errors |
| Module Name: | downcounter | Implementation State: | Synthesized |
| Target Device: | xc6slx16-3csg324 |
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| Product Version: | ISE 14.7 |
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| Design Goal: | Balanced |
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| Design Strategy: | Xilinx Default (unlocked) |
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| Environment: | System Settings |
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| Device Utilization Summary (estimated values) | [-] | |||
| Logic Utilization | Used | Available | Utilization | |
| Number of Slice Registers | 12 | 18224 | 0% | |
| Number of Slice LUTs | 17 | 9112 | 0% | |
| Number of fully used LUT-FF pairs | 4 | 25 | 16% | |
| Number of bonded IOBs | 16 | 232 | 6% | |
| Number of BUFG/BUFGCTRLs | 1 | 16 | 6% | |
| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Synthesis Report | Current | 週五 三月 25 19:40:53 2016 | ||||
| Translation Report | ||||||
| Map Report | ||||||
| Place and Route Report | ||||||
| CPLD Fitter Report (Text) | ||||||
| Power Report | ||||||
| Post-PAR Static Timing Report | ||||||
| Bitgen Report | ||||||
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |
| ISIM Simulator Log | Out of Date | 週六 三月 26 17:18:04 2016 | |