Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx16
Project ID (random number) dfb930b1acd743ac8ca2cd659d1b1b76.B7B6C82696F14E88A23D0B3A331BBCE1.44 Target Package: csg324
Registration ID 211160026_0_0_772 Target Speed: -3
Date Generated 2016-04-12T10:59:21 Tool Flow ISE
 
User Environment
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i5-4210U CPU @ 1.70GHz CPU Speed 2394 MHz
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i5-4210U CPU @ 1.70GHz CPU Speed 2394 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=7
  • 25-bit adder=1
  • 4-bit adder=1
  • 4-bit subtractor=2
  • 5-bit adder=3
Comparators=4
  • 4-bit comparator greater=1
  • 5-bit comparator lessequal=3
Counters=1
  • 2-bit up counter=1
FSMs=1 Multiplexers=20
  • 1-bit 2-to-1 multiplexer=2
  • 15-bit 4-to-1 multiplexer=1
  • 4-bit 2-to-1 multiplexer=17
RAMs=6
  • 16x15-bit single-port distributed Read Only RAM=4
  • 4x4-bit single-port distributed Read Only RAM=2
Registers=51
  • Flip-Flops=51
MiscellaneousStatistics
  • AGG_BONDED_IO=29
  • AGG_IO=29
  • AGG_LOCED_IO=29
  • AGG_SLICE=41
  • NUM_BONDED_IOB=29
  • NUM_BSFULL=51
  • NUM_BSLUTONLY=73
  • NUM_BSUSED=124
  • NUM_BUFG=1
  • NUM_LOCED_IOB=29
  • NUM_LOGIC_O5ANDO6=30
  • NUM_LOGIC_O5ONLY=23
  • NUM_LOGIC_O6ONLY=70
  • NUM_LUT_RT_DRIVES_CARRY4=1
  • NUM_LUT_RT_EXO6=1
  • NUM_LUT_RT_O6=23
  • NUM_SLICEL=18
  • NUM_SLICEX=23
  • NUM_SLICE_CARRY4=7
  • NUM_SLICE_CONTROLSET=8
  • NUM_SLICE_CYINIT=178
  • NUM_SLICE_F7MUX=11
  • NUM_SLICE_FF=56
  • NUM_SLICE_UNUSEDCTRL=21
  • NUM_UNUSABLE_FF_BELS=32
NetStatistics
  • NumNets_Active=186
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=6
  • NumNodesOfType_Active_BOUNCEIN=30
  • NumNodesOfType_Active_BUFGOUT=1
  • NumNodesOfType_Active_BUFHINP2OUT=2
  • NumNodesOfType_Active_CLKPIN=20
  • NumNodesOfType_Active_CLKPINFEED=2
  • NumNodesOfType_Active_CNTRLPIN=29
  • NumNodesOfType_Active_DOUBLE=187
  • NumNodesOfType_Active_GENERIC=29
  • NumNodesOfType_Active_GLOBAL=10
  • NumNodesOfType_Active_INPUT=7
  • NumNodesOfType_Active_IOBIN2OUT=23
  • NumNodesOfType_Active_IOBOUTPUT=23
  • NumNodesOfType_Active_LUTINPUT=511
  • NumNodesOfType_Active_OUTBOUND=157
  • NumNodesOfType_Active_OUTPUT=158
  • NumNodesOfType_Active_PADINPUT=18
  • NumNodesOfType_Active_PADOUTPUT=6
  • NumNodesOfType_Active_PINBOUNCE=81
  • NumNodesOfType_Active_PINFEED=570
  • NumNodesOfType_Active_QUAD=62
  • NumNodesOfType_Active_REGINPUT=11
  • NumNodesOfType_Active_SINGLE=301
  • NumNodesOfType_Vcc_GENERIC=5
  • NumNodesOfType_Vcc_HVCCOUT=30
  • NumNodesOfType_Vcc_IOBIN2OUT=5
  • NumNodesOfType_Vcc_IOBOUTPUT=5
  • NumNodesOfType_Vcc_LUTINPUT=53
  • NumNodesOfType_Vcc_PADINPUT=5
  • NumNodesOfType_Vcc_PINFEED=58
SiteStatistics
  • BUFG-BUFGMUX=1
  • IOB-IOBM=15
  • IOB-IOBS=14
  • SLICEL-SLICEM=5
  • SLICEX-SLICEL=4
  • SLICEX-SLICEM=3
SiteSummary
  • BUFG=1
  • BUFG_BUFG=1
  • CARRY4=7
  • FF_SR=6
  • HARD0=1
  • INVERTER=1
  • IOB=29
  • IOB_IMUX=6
  • IOB_INBUF=6
  • IOB_OUTBUF=23
  • LUT5=53
  • LUT6=124
  • PAD=29
  • REG_SR=50
  • SELMUX2_1=11
  • SLICEL=18
  • SLICEX=23
 
Configuration Data
FF_SR
  • CK=[CK:6] [CK_INV:0]
  • SRINIT=[SRINIT0:2] [SRINIT1:4]
  • SYNC_ATTR=[ASYNC:6]
IOB_OUTBUF
  • DRIVEATTRBOX=[12:23]
  • SLEW=[SLOW:23]
  • SUSPEND=[3STATE:23]
REG_SR
  • CK=[CK:50] [CK_INV:0]
  • LATCH_OR_FF=[FF:50]
  • SRINIT=[SRINIT0:34] [SRINIT1:16]
  • SYNC_ATTR=[ASYNC:50]
SLICEL
  • CLK=[CLK:10] [CLK_INV:0]
SLICEX
  • CLK=[CLK:10] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=1
  • O=1
BUFG_BUFG
  • I0=1
  • O=1
CARRY4
  • CIN=6
  • CO3=6
  • CYINIT=1
  • DI0=6
  • DI1=6
  • DI2=6
  • DI3=6
  • O0=7
  • O1=6
  • O2=6
  • O3=6
  • S0=7
  • S1=6
  • S2=6
  • S3=6
FF_SR
  • CE=4
  • CK=6
  • D=6
  • Q=6
  • SR=6
HARD0
  • 0=1
INVERTER
  • IN=1
  • OUT=1
IOB
  • I=6
  • O=23
  • PAD=29
IOB_IMUX
  • I=5
  • I_B=1
  • OUT=6
IOB_INBUF
  • OUT=6
  • PAD=6
IOB_OUTBUF
  • IN=23
  • OUT=23
LUT5
  • A1=6
  • A2=21
  • A3=23
  • A4=24
  • A5=23
  • O5=53
LUT6
  • A1=54
  • A2=71
  • A3=83
  • A4=120
  • A5=97
  • A6=122
  • O6=124
PAD
  • PAD=29
REG_SR
  • CE=16
  • CK=50
  • D=50
  • Q=50
  • SR=50
SELMUX2_1
  • 0=11
  • 1=11
  • OUT=11
  • S0=11
SLICEL
  • A=5
  • A1=5
  • A2=5
  • A3=5
  • A4=12
  • A5=6
  • A6=12
  • AQ=8
  • B=10
  • B1=3
  • B2=11
  • B3=11
  • B4=17
  • B5=11
  • B6=17
  • BMUX=8
  • BQ=7
  • C1=11
  • C2=11
  • C3=11
  • C4=17
  • C5=11
  • C6=17
  • CE=3
  • CIN=6
  • CLK=10
  • CMUX=8
  • COUT=6
  • CQ=9
  • CX=11
  • D1=8
  • D2=10
  • D3=10
  • D4=16
  • D5=11
  • D6=17
  • DQ=6
  • SR=10
SLICEX
  • A=14
  • A1=6
  • A2=11
  • A3=14
  • A4=20
  • A5=20
  • A6=20
  • AMUX=9
  • AQ=8
  • B=11
  • B1=10
  • B2=11
  • B3=13
  • B4=14
  • B5=13
  • B6=14
  • BMUX=4
  • BQ=4
  • C=8
  • C1=10
  • C2=11
  • C3=14
  • C4=14
  • C5=14
  • C6=14
  • CE=6
  • CLK=10
  • CMUX=2
  • CQ=6
  • D=9
  • D1=5
  • D2=9
  • D3=10
  • D4=10
  • D5=11
  • D6=11
  • DMUX=6
  • DQ=2
  • SR=10
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -i -p xc6slx16-csg324-3 <ise_file> <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -i -p xc6slx16-csg324-3 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • fuse
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 30 23 0 0 0 0 0
bitgen 31 31 0 0 0 0 0
map 31 31 0 0 0 0 0
ngdbuild 31 31 0 0 0 0 0
par 31 31 0 0 0 0 0
trce 31 31 0 0 0 0 0
xst 75 74 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/pn_db_design_properties.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store non-default values only
PROP_SelectedInstanceHierarchicalPath=/exp1 PROP_Simulator=ISim (VHDL/Verilog)
PROP_SynthTopFile=changed PROP_Top_Level_Module_Type=HDL
PROP_UseSmartGuide=false PROP_UserConstraintEditorPreference=Text Editor
PROP_intProjectCreationTimestamp=2016-04-08T14:09:25 PROP_intWbtProjectID=B7B6C82696F14E88A23D0B3A331BBCE1
PROP_intWbtProjectIteration=44 PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No PROP_selectedSimRootSourceNode_behav=work.exp1
PROP_AutoTop=false PROP_DevFamily=Spartan6
PROP_DevDevice=xc6slx16 PROP_DevFamilyPMName=spartan6
PROP_ISimSimulationRunTime_behav_tb=10000 ns PROP_DevPackage=csg324
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-3
PROP_PreferredLanguage=Verilog FILE_UCF=1
FILE_VERILOG=10
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FDC=36 NGDBUILD_NUM_FDPE=20 NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=5 NGDBUILD_NUM_INV=3 NGDBUILD_NUM_LUT1=24 NGDBUILD_NUM_LUT2=24
NGDBUILD_NUM_LUT3=12 NGDBUILD_NUM_LUT4=29 NGDBUILD_NUM_LUT5=11 NGDBUILD_NUM_LUT6=52
NGDBUILD_NUM_MUXCY=24 NGDBUILD_NUM_MUXF7=11 NGDBUILD_NUM_OBUF=23 NGDBUILD_NUM_VCC=1
NGDBUILD_NUM_XORCY=25
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FDC=36 NGDBUILD_NUM_FDPE=20 NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=5 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=3 NGDBUILD_NUM_LUT1=24
NGDBUILD_NUM_LUT2=24 NGDBUILD_NUM_LUT3=12 NGDBUILD_NUM_LUT4=29 NGDBUILD_NUM_LUT5=11
NGDBUILD_NUM_LUT6=52 NGDBUILD_NUM_MUXCY=24 NGDBUILD_NUM_MUXF7=11 NGDBUILD_NUM_OBUF=23
NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=25
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx16-3-csg324
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5
 
ISim Statistics
Xilinx HDL Libraries Used=
Fuse Resource Usage=452 ms, 27008 KB
Total Signals=21
Total Nets=36
Total Blocks=3
Total Processes=18
Total Simulation Time=10 us
Simulation Resource Usage=0.125 sec, 339587 KB
Simulation Mode=gui
Hardware CoSim=0