D Project Status (06/15/2016 - 00:37:10)
Project File:	D-M.xise	Parser Errors:	No Errors
Module Name:	D	Implementation State:	Programming File Not Generated
Target Device:	xc6slx16-3csg324	Errors:
Product Version:	ISE 14.7	Warnings:
Design Goal:	Balanced	Routing Results:
Design Strategy:	Xilinx Default (unlocked)	Timing Constraints:
Environment:		Final Timing Score:

 

Detailed Reports						[-]
Report Name	Status	Generated	Errors	Warnings	Infos
Synthesis Report
Translation Report
Map Report
Place and Route Report
CPLD Fitter Report (Text)
Power Report
Post-PAR Static Timing Report
Bitgen Report

 

Secondary Reports			[-]
Report Name	Status	Generated
WebTalk Report	Current	週三 六月 15 00:37:00 2016
WebTalk Log File	Current	週三 六月 15 00:37:10 2016

Date Generated: 06/15/2016 - 00:37:10