Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
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| Tool Version : Vivado v.2015.4 (win64) Build 1412921 Wed Nov 18 09:43:45 MST 2015
| Date         : Tue Feb 02 17:06:25 2016
| Host         : WK84 running 64-bit major release  (build 9200)
| Command      : report_control_sets -verbose -file Servo_interface_control_sets_placed.rpt
| Design       : Servo_interface
| Device       : xc7a35t
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Control Set Information

Table of Contents
-----------------
1. Summary
2. Flip-Flop Distribution
3. Detailed Control Set Information

1. Summary
----------

+-------------------------------------------------------------------+-------+
|                               Status                              | Count |
+-------------------------------------------------------------------+-------+
| Number of unique control sets                                     |     1 |
| Minimum Number of register sites lost to control set restrictions |     4 |
+-------------------------------------------------------------------+-------+


2. Flip-Flop Distribution
-------------------------

+--------------+-----------------------+------------------------+-----------------+--------------+
| Clock Enable | Synchronous Set/Reset | Asynchronous Set/Reset | Total Registers | Total Slices |
+--------------+-----------------------+------------------------+-----------------+--------------+
| No           | No                    | No                     |               0 |            0 |
| No           | No                    | Yes                    |               0 |            0 |
| No           | Yes                   | No                     |              20 |            5 |
| Yes          | No                    | No                     |               0 |            0 |
| Yes          | No                    | Yes                    |               0 |            0 |
| Yes          | Yes                   | No                     |               0 |            0 |
+--------------+-----------------------+------------------------+-----------------+--------------+


3. Detailed Control Set Information
-----------------------------------

+----------------+---------------+------------------+------------------+----------------+
|  Clock Signal  | Enable Signal | Set/Reset Signal | Slice Load Count | Bel Load Count |
+----------------+---------------+------------------+------------------+----------------+
|  clk_IBUF_BUFG |               | count/0]_i_1_n_0 |                5 |             20 |
+----------------+---------------+------------------+------------------+----------------+


