Index of /archive/邏設實驗/110李濬屹/Lab 4/
../
visio/ 23-Oct-2024 06:03 -
Lab 4 Finite State Machines.pdf 23-Oct-2024 06:03 1M
Lab4_Team30_Built_In_Self_Test.v 23-Oct-2024 06:03 1272
Lab4_Team30_Built_In_Self_Test_t.v 23-Oct-2024 06:03 1063
Lab4_Team30_Content_Addressable_Memory.v 23-Oct-2024 06:03 3482
Lab4_Team30_Content_Addressable_Memory_t.v 23-Oct-2024 06:03 3287
Lab4_Team30_Mealy_Sequence_Detector.v 23-Oct-2024 06:03 1905
Lab4_Team30_Mealy_Sequence_Detector_t.v 23-Oct-2024 06:03 873
Lab4_Team30_Report.docx 23-Oct-2024 06:03 4M
Lab4_Team30_Report.pdf 23-Oct-2024 06:03 1M
Lab4_Team30_Report_FPGA.docx 23-Oct-2024 06:03 3M
Lab4_Team30_Report_FPGA.pdf 23-Oct-2024 06:03 543K
Lab4_Team30_Scan_Chain_Design.v 23-Oct-2024 06:03 654
Lab4_Team30_Scan_Chain_Design_t.v 23-Oct-2024 06:03 1493
Q4_block_diagram.png 23-Oct-2024 06:03 22K
Q4_sequence_detector.png 23-Oct-2024 06:03 14K
Q4_state_diagram.png 23-Oct-2024 06:03 73K
basic_state_diagram.png 23-Oct-2024 06:03 41K
fpga_1a2b.png 23-Oct-2024 06:03 67K
fpga_lfsr.png 23-Oct-2024 06:03 64K
fpga_seven_segment.png 23-Oct-2024 06:03 32K
fpga_state_diagram.png 23-Oct-2024 06:03 29K