Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx16
Project ID (random number) d96cc176c19a412192bec84ffaf3406b.292C22E8E15841BDAAD4E825BE92DECF.2 Target Package: csg324
Registration ID 210913348_0_0_143 Target Speed: -3
Date Generated 2015-05-21T16:58:50 Tool Flow ISE
 
User Environment
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz CPU Speed 2494 MHz
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz CPU Speed 2494 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=3
  • 25-bit adder=1
  • 7-bit adder=1
  • 8-bit addsub=1
 Comparators=1
  • 20-bit comparator equal=1
 Counters=2
  • 20-bit up counter=1
  • 4-bit up counter=1
 Multiplexers=11
  • 1-bit 32-to-1 multiplexer=1
  • 15-bit 4-to-1 multiplexer=1
  • 16-bit 2-to-1 multiplexer=1
  • 20-bit 2-to-1 multiplexer=2
  • 8-bit 2-to-1 multiplexer=6
 RAMs=10
  • 16x15-bit single-port distributed Read Only RAM=2
  • 16x4-bit single-port distributed Read Only RAM=7
  • 4x4-bit single-port distributed Read Only RAM=1
 Registers=78
  • Flip-Flops=78
 		MiscellaneousStatistics
  • AGG_BONDED_IO=31
  • AGG_IO=31
  • AGG_LOCED_IO=31
  • AGG_SLICE=35
  • NUM_BONDED_IOB=31
  • NUM_BSFULL=69
  • NUM_BSLUTONLY=39
  • NUM_BSUSED=108
  • NUM_BUFG=1
  • NUM_LOCED_IOB=31
  • NUM_LOGIC_O5ANDO6=42
  • NUM_LOGIC_O5ONLY=23
  • NUM_LOGIC_O6ONLY=42
  • NUM_LUT_RT_DRIVES_CARRY4=1
  • NUM_LUT_RT_EXO6=1
  • NUM_LUT_RT_O6=23
  • NUM_SLICEL=17
  • NUM_SLICEX=18
  • NUM_SLICE_CARRY4=14
  • NUM_SLICE_CONTROLSET=3
  • NUM_SLICE_CYINIT=175
  • NUM_SLICE_F7MUX=4
  • NUM_SLICE_F8MUX=1
  • NUM_SLICE_FF=75
  • NUM_SLICE_UNUSEDCTRL=12
  • NUM_UNUSABLE_FF_BELS=5
 		NetStatistics
  • NumNets_Active=166
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=1
  • NumNodesOfType_Active_BOUNCEIN=23
  • NumNodesOfType_Active_BUFGOUT=1
  • NumNodesOfType_Active_BUFHINP2OUT=2
  • NumNodesOfType_Active_CLKPIN=23
  • NumNodesOfType_Active_CLKPINFEED=2
  • NumNodesOfType_Active_CNTRLPIN=27
  • NumNodesOfType_Active_DOUBLE=124
  • NumNodesOfType_Active_GENERIC=31
  • NumNodesOfType_Active_GLOBAL=15
  • NumNodesOfType_Active_INPUT=13
  • NumNodesOfType_Active_IOBIN2OUT=24
  • NumNodesOfType_Active_IOBOUTPUT=24
  • NumNodesOfType_Active_LUTINPUT=367
  • NumNodesOfType_Active_OUTBOUND=132
  • NumNodesOfType_Active_OUTPUT=130
  • NumNodesOfType_Active_PADINPUT=16
  • NumNodesOfType_Active_PADOUTPUT=7
  • NumNodesOfType_Active_PINBOUNCE=56
  • NumNodesOfType_Active_PINFEED=430
  • NumNodesOfType_Active_QUAD=73
  • NumNodesOfType_Active_REGINPUT=4
  • NumNodesOfType_Active_SINGLE=195
  • NumNodesOfType_Vcc_GENERIC=8
  • NumNodesOfType_Vcc_HVCCOUT=30
  • NumNodesOfType_Vcc_IOBIN2OUT=8
  • NumNodesOfType_Vcc_IOBOUTPUT=8
  • NumNodesOfType_Vcc_KVCCOUT=1
  • NumNodesOfType_Vcc_LUTINPUT=65
  • NumNodesOfType_Vcc_PADINPUT=8
  • NumNodesOfType_Vcc_PINBOUNCE=3
  • NumNodesOfType_Vcc_PINFEED=73
  • NumNodesOfType_Vcc_REGINPUT=3
 SiteStatistics
  • BUFG-BUFGMUX=1
  • IOB-IOBM=16
  • IOB-IOBS=15
  • SLICEL-SLICEM=14
  • SLICEX-SLICEL=6
  • SLICEX-SLICEM=2
 		SiteSummary
  • BUFG=1
  • BUFG_BUFG=1
  • CARRY4=14
  • FF_SR=7
  • HARD0=2
  • INVERTER=1
  • IOB=31
  • IOB_IMUX=7
  • IOB_INBUF=7
  • IOB_OUTBUF=24
  • LUT5=65
  • LUT6=108
  • PAD=31
  • REG_SR=68
  • SELMUX2_1=5
  • SLICEL=17
  • SLICEX=18
 
Configuration Data
FF_SR
  • CK=[CK:7] [CK_INV:0]
  • SRINIT=[SRINIT0:7]
  • SYNC_ATTR=[ASYNC:7]
 IOB_OUTBUF
  • DRIVEATTRBOX=[12:24]
  • SLEW=[SLOW:24]
  • SUSPEND=[3STATE:24]
 REG_SR
  • CK=[CK:68] [CK_INV:0]
  • LATCH_OR_FF=[FF:68]
  • SRINIT=[SRINIT0:66] [SRINIT1:2]
  • SYNC_ATTR=[ASYNC:68]
 SLICEL
  • CLK=[CLK:12] [CLK_INV:0]
 SLICEX
  • CLK=[CLK:11] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=1
  • O=1
 BUFG_BUFG
  • I0=1
  • O=1
 CARRY4
  • CIN=12
  • CO2=1
  • CO3=12
  • CYINIT=2
  • DI0=13
  • DI1=13
  • DI2=13
  • DI3=11
  • O0=12
  • O1=11
  • O2=11
  • O3=11
  • S0=14
  • S1=13
  • S2=13
  • S3=13
 FF_SR
  • CE=1
  • CK=7
  • D=7
  • Q=7
  • SR=7
 HARD0
  • 0=2
 INVERTER
  • IN=1
  • OUT=1
 IOB
  • I=7
  • O=24
  • PAD=31
 IOB_IMUX
  • I=6
  • I_B=1
  • OUT=7
 IOB_INBUF
  • OUT=7
  • PAD=7
 IOB_OUTBUF
  • IN=24
  • OUT=24
 LUT5
  • A1=8
  • A2=9
  • A3=15
  • A4=12
  • A5=16
  • O5=65
 LUT6
  • A1=35
  • A2=41
  • A3=51
  • A4=107
  • A5=79
  • A6=104
  • O6=108
 PAD
  • PAD=31
 REG_SR
  • CE=7
  • CK=68
  • D=68
  • Q=68
  • SR=68
 SELMUX2_1
  • 0=5
  • 1=4
  • OUT=5
  • S0=5
 SLICEL
  • A=1
  • A1=3
  • A2=3
  • A3=3
  • A4=15
  • A5=8
  • A6=14
  • AQ=12
  • AX=2
  • B=1
  • B1=3
  • B2=3
  • B3=4
  • B4=15
  • B5=9
  • B6=15
  • BMUX=2
  • BQ=11
  • BX=2
  • C1=2
  • C2=4
  • C3=4
  • C4=16
  • C5=10
  • C6=16
  • CIN=12
  • CLK=12
  • CMUX=3
  • COUT=12
  • CQ=11
  • CX=3
  • D1=3
  • D2=3
  • D3=4
  • D4=15
  • D5=8
  • D6=15
  • DQ=11
  • DX=1
  • SR=12
 SLICEX
  • A=8
  • A1=10
  • A2=11
  • A3=14
  • A4=15
  • A5=15
  • A6=15
  • AMUX=6
  • AQ=7
  • B=8
  • B1=8
  • B2=9
  • B3=11
  • B4=14
  • B5=12
  • B6=12
  • BMUX=3
  • BQ=6
  • C=6
  • C1=6
  • C2=6
  • C3=10
  • C4=11
  • C5=11
  • C6=11
  • CE=4
  • CLK=11
  • CMUX=4
  • CQ=5
  • D=1
  • D1=6
  • D2=6
  • D3=6
  • D4=6
  • D5=6
  • D6=6
  • DMUX=4
  • DQ=5
  • SR=11
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 418 408 0 0 0 0 0
bitgen 371 371 0 0 0 0 0
map 379 372 0 0 0 0 0
netgen 1 1 0 0 0 0 0
ngc2edif 5 5 0 0 0 0 0
ngdbuild 401 396 0 0 0 0 0
par 370 370 0 0 0 0 0
trce 368 368 0 0 0 0 0
xps 2 0 0 0 0 0 0
xst 599 575 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/ite_c_overview.htm ( 2 ) /doc/usenglish/isehelp/spartan6/libs_le_acc16.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor PROP_intProjectCreationTimestamp=2015-05-21T01:43:47
PROP_intWbtProjectID=292C22E8E15841BDAAD4E825BE92DECF PROP_intWbtProjectIteration=2
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_xilxBitgStart_IntDone=true PROP_AutoTop=false
PROP_DevFamily=Spartan6 PROP_DevDevice=xc6slx16
PROP_DevFamilyPMName=spartan6 PROP_DevPackage=csg324
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-3
PROP_PreferredLanguage=Verilog FILE_UCF=1
FILE_VERILOG=11
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FDC=66 NGDBUILD_NUM_FDCE=7 NGDBUILD_NUM_FDP=1
NGDBUILD_NUM_FDPE=1 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=7 NGDBUILD_NUM_INV=4
NGDBUILD_NUM_LUT1=24 NGDBUILD_NUM_LUT2=37 NGDBUILD_NUM_LUT3=11 NGDBUILD_NUM_LUT4=7
NGDBUILD_NUM_LUT5=12 NGDBUILD_NUM_LUT6=32 NGDBUILD_NUM_MUXCY=51 NGDBUILD_NUM_MUXF7=4
NGDBUILD_NUM_MUXF8=1 NGDBUILD_NUM_OBUF=24 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=45
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FDC=66 NGDBUILD_NUM_FDCE=7 NGDBUILD_NUM_FDP=1
NGDBUILD_NUM_FDPE=1 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=7 NGDBUILD_NUM_INV=4
NGDBUILD_NUM_LUT1=24 NGDBUILD_NUM_LUT2=37 NGDBUILD_NUM_LUT3=11 NGDBUILD_NUM_LUT4=7
NGDBUILD_NUM_LUT5=12 NGDBUILD_NUM_LUT6=32 NGDBUILD_NUM_MUXCY=51 NGDBUILD_NUM_MUXF7=4
NGDBUILD_NUM_MUXF8=1 NGDBUILD_NUM_OBUF=24 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=45
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx16-3-csg324
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5