Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx16
Project ID (random number) d96cc176c19a412192bec84ffaf3406b.DF4BDE5B74AA414393CBE96836462518.4 Target Package: csg324
Registration ID 210913348_0_0_143 Target Speed: -3
Date Generated 2015-05-07T21:17:51 Tool Flow ISE
 
User Environment
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz CPU Speed 2494 MHz
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz CPU Speed 2494 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=13
  • 25-bit adder=1
  • 4-bit adder=10
  • 4-bit addsub=1
  • 4-bit subtractor=1
 Comparators=3
  • 4-bit comparator equal=2
  • 8-bit comparator greater=1
 Counters=2
  • 18-bit up counter=1
  • 25-bit up counter=1
 FSMs=1 Multiplexers=45
  • 1-bit 2-to-1 multiplexer=1
  • 4-bit 2-to-1 multiplexer=39
  • 4-bit 4-to-1 multiplexer=5
 RAMs=2
  • 16x15-bit single-port distributed Read Only RAM=1
  • 4x4-bit single-port distributed Read Only RAM=1
 Registers=82
  • Flip-Flops=82
 		MiscellaneousStatistics
  • AGG_BONDED_IO=23
  • AGG_IO=23
  • AGG_LOCED_IO=23
  • AGG_SLICE=82
  • NUM_BONDED_IOB=23
  • NUM_BSFULL=92
  • NUM_BSLUTONLY=154
  • NUM_BSREGONLY=8
  • NUM_BSUSED=254
  • NUM_BUFG=2
  • NUM_LOCED_IOB=23
  • NUM_LOGIC_O5ANDO6=32
  • NUM_LOGIC_O5ONLY=54
  • NUM_LOGIC_O6ONLY=157
  • NUM_LUT_RT_DRIVES_CARRY4=3
  • NUM_LUT_RT_EXO6=3
  • NUM_LUT_RT_O6=54
  • NUM_SLICEL=23
  • NUM_SLICEX=59
  • NUM_SLICE_CARRY4=17
  • NUM_SLICE_CONTROLSET=5
  • NUM_SLICE_CYINIT=335
  • NUM_SLICE_F7MUX=6
  • NUM_SLICE_FF=114
  • NUM_SLICE_UNUSEDCTRL=47
  • NUM_UNUSABLE_FF_BELS=22
 		NetStatistics
  • NumNets_Active=320
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=5
  • NumNodesOfType_Active_BOUNCEIN=40
  • NumNodesOfType_Active_BUFGOUT=2
  • NumNodesOfType_Active_BUFHINP2OUT=3
  • NumNodesOfType_Active_CLKPIN=35
  • NumNodesOfType_Active_CLKPINFEED=7
  • NumNodesOfType_Active_CNTRLPIN=37
  • NumNodesOfType_Active_DOUBLE=333
  • NumNodesOfType_Active_GENERIC=24
  • NumNodesOfType_Active_GLOBAL=24
  • NumNodesOfType_Active_INPUT=16
  • NumNodesOfType_Active_IOBIN2OUT=20
  • NumNodesOfType_Active_IOBOUTPUT=20
  • NumNodesOfType_Active_LUTINPUT=966
  • NumNodesOfType_Active_OUTBOUND=296
  • NumNodesOfType_Active_OUTPUT=308
  • NumNodesOfType_Active_PADINPUT=16
  • NumNodesOfType_Active_PADOUTPUT=4
  • NumNodesOfType_Active_PINBOUNCE=128
  • NumNodesOfType_Active_PINFEED=1055
  • NumNodesOfType_Active_QUAD=77
  • NumNodesOfType_Active_REGINPUT=17
  • NumNodesOfType_Active_SINGLE=480
  • NumNodesOfType_Vcc_GENERIC=3
  • NumNodesOfType_Vcc_HVCCOUT=32
  • NumNodesOfType_Vcc_IOBIN2OUT=3
  • NumNodesOfType_Vcc_IOBOUTPUT=3
  • NumNodesOfType_Vcc_LUTINPUT=86
  • NumNodesOfType_Vcc_PADINPUT=3
  • NumNodesOfType_Vcc_PINFEED=89
 SiteStatistics
  • BUFG-BUFGMUX=2
  • IOB-IOBM=13
  • IOB-IOBS=10
  • SLICEL-SLICEM=14
  • SLICEX-SLICEL=16
  • SLICEX-SLICEM=11
 		SiteSummary
  • BUFG=2
  • BUFG_BUFG=2
  • CARRY4=17
  • FF_SR=15
  • HARD0=3
  • INVERTER=3
  • IOB=23
  • IOB_IMUX=4
  • IOB_INBUF=4
  • IOB_OUTBUF=19
  • LUT5=86
  • LUT6=246
  • PAD=23
  • REG_SR=99
  • SELMUX2_1=6
  • SLICEL=23
  • SLICEX=59
 
Configuration Data
FF_SR
  • CK=[CK:15] [CK_INV:0]
  • SRINIT=[SRINIT0:15]
  • SYNC_ATTR=[ASYNC:15]
 IOB_OUTBUF
  • DRIVEATTRBOX=[12:19]
  • SLEW=[SLOW:19]
  • SUSPEND=[3STATE:19]
 REG_SR
  • CK=[CK:99] [CK_INV:0]
  • LATCH_OR_FF=[FF:99]
  • SRINIT=[SRINIT0:95] [SRINIT1:4]
  • SYNC_ATTR=[ASYNC:99]
 SLICEL
  • CLK=[CLK:6] [CLK_INV:0]
 SLICEX
  • CLK=[CLK:29] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=2
  • O=2
 BUFG_BUFG
  • I0=2
  • O=2
 CARRY4
  • CIN=14
  • CO3=14
  • CYINIT=3
  • DI0=15
  • DI1=14
  • DI2=14
  • DI3=14
  • O0=15
  • O1=13
  • O2=13
  • O3=13
  • S0=17
  • S1=15
  • S2=14
  • S3=14
 FF_SR
  • CK=15
  • D=15
  • Q=15
  • SR=15
 HARD0
  • 0=3
 INVERTER
  • IN=3
  • OUT=3
 IOB
  • I=4
  • O=19
  • PAD=23
 IOB_IMUX
  • I=1
  • I_B=3
  • OUT=4
 IOB_INBUF
  • OUT=4
  • PAD=4
 IOB_OUTBUF
  • IN=19
  • OUT=19
 LUT5
  • A1=3
  • A2=12
  • A3=25
  • A4=16
  • A5=27
  • O5=86
 LUT6
  • A1=93
  • A2=136
  • A3=147
  • A4=194
  • A5=221
  • A6=240
  • O6=246
 PAD
  • PAD=23
 REG_SR
  • CE=2
  • CK=99
  • D=99
  • Q=99
  • SR=99
 SELMUX2_1
  • 0=6
  • 1=6
  • OUT=6
  • S0=6
 SLICEL
  • A=5
  • A1=4
  • A2=4
  • A3=4
  • A4=10
  • A5=16
  • A6=21
  • AMUX=10
  • AQ=5
  • B=5
  • B1=1
  • B2=2
  • B3=2
  • B4=10
  • B5=15
  • B6=20
  • BMUX=9
  • BQ=5
  • C1=2
  • C2=5
  • C3=5
  • C4=9
  • C5=15
  • C6=19
  • CE=1
  • CIN=14
  • CLK=6
  • CMUX=15
  • COUT=14
  • CQ=4
  • CX=6
  • D1=5
  • D2=5
  • D3=5
  • D4=9
  • D5=15
  • D6=19
  • DMUX=9
  • DQ=4
  • SR=6
 SLICEX
  • A=33
  • A1=30
  • A2=39
  • A3=47
  • A4=50
  • A5=51
  • A6=51
  • AMUX=7
  • AQ=24
  • AX=4
  • B=33
  • B1=27
  • B2=39
  • B3=43
  • B4=46
  • B5=47
  • B6=48
  • BMUX=9
  • BQ=20
  • BX=3
  • C=14
  • C1=14
  • C2=26
  • C3=31
  • C4=32
  • C5=33
  • C6=33
  • CE=1
  • CLK=29
  • CMUX=7
  • CQ=22
  • CX=2
  • D=16
  • D1=12
  • D2=20
  • D3=25
  • D4=28
  • D5=29
  • D6=29
  • DMUX=6
  • DQ=15
  • DX=2
  • SR=29
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 344 337 0 0 0 0 0
bitgen 304 304 0 0 0 0 0
map 302 302 0 0 0 0 0
netgen 1 1 0 0 0 0 0
ngc2edif 4 4 0 0 0 0 0
ngdbuild 319 316 0 0 0 0 0
par 300 300 0 0 0 0 0
trce 299 299 0 0 0 0 0
xps 2 0 0 0 0 0 0
xst 462 447 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/ite_c_overview.htm ( 2 ) /doc/usenglish/isehelp/spartan6/libs_le_acc16.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor PROP_intProjectCreationTimestamp=2015-05-07T21:09:10
PROP_intWbtProjectID=DF4BDE5B74AA414393CBE96836462518 PROP_intWbtProjectIteration=4
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_AutoTop=true PROP_DevFamily=Spartan6
PROP_DevDevice=xc6slx16 PROP_DevFamilyPMName=spartan6
PROP_DevPackage=csg324 PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-3 PROP_PreferredLanguage=Verilog
FILE_UCF=1 FILE_VERILOG=11
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FDC=108 NGDBUILD_NUM_FDCE=2
NGDBUILD_NUM_FDP=4 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=3 NGDBUILD_NUM_INV=9
NGDBUILD_NUM_LUT1=57 NGDBUILD_NUM_LUT2=42 NGDBUILD_NUM_LUT3=14 NGDBUILD_NUM_LUT4=22
NGDBUILD_NUM_LUT5=41 NGDBUILD_NUM_LUT6=91 NGDBUILD_NUM_MUXCY=57 NGDBUILD_NUM_MUXF7=6
NGDBUILD_NUM_OBUF=19 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=54
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=2 NGDBUILD_NUM_FDC=108 NGDBUILD_NUM_FDCE=2 NGDBUILD_NUM_FDP=4
NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=3 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=9
NGDBUILD_NUM_LUT1=57 NGDBUILD_NUM_LUT2=42 NGDBUILD_NUM_LUT3=14 NGDBUILD_NUM_LUT4=22
NGDBUILD_NUM_LUT5=41 NGDBUILD_NUM_LUT6=91 NGDBUILD_NUM_MUXCY=57 NGDBUILD_NUM_MUXF7=6
NGDBUILD_NUM_OBUF=19 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=54
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx16-3-csg324
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5