Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx16
Project ID (random number) d96cc176c19a412192bec84ffaf3406b.A165844EB747482CAFFF04ADD334FD0A.2 Target Package: csg324
Registration ID 210913348_0_0_143 Target Speed: -3
Date Generated 2015-05-01T05:34:01 Tool Flow ISE
 
User Environment
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz CPU Speed 2494 MHz
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz CPU Speed 2494 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=5
  • 25-bit adder=1
  • 4-bit adder carry in=2
  • 5-bit adder=1
  • 7-bit adder=1
 Comparators=1
  • 4-bit comparator lessequal=1
 FSMs=1 MACs=1
  • 2x3-to-4-bit MAC=1
 Multiplexers=8
  • 1-bit 2-to-1 multiplexer=2
  • 4-bit 2-to-1 multiplexer=3
  • 4-bit 4-to-1 multiplexer=1
  • 7-bit 2-to-1 multiplexer=2
 Multipliers=1
  • 4x4-bit multiplier=1
 RAMs=9
  • 16x15-bit single-port distributed Read Only RAM=1
  • 16x4-bit single-port distributed Read Only RAM=7
  • 4x4-bit single-port distributed Read Only RAM=1
 Registers=62
  • Flip-Flops=62
 		MiscellaneousStatistics
  • AGG_BONDED_IO=40
  • AGG_IO=40
  • AGG_LOCED_IO=40
  • AGG_SLICE=54
  • NUM_BONDED_IOB=40
  • NUM_BSFULL=65
  • NUM_BSLUTONLY=63
  • NUM_BSREGONLY=16
  • NUM_BSUSED=144
  • NUM_BUFG=3
  • NUM_LOCED_IOB=40
  • NUM_LOGIC_O5ANDO6=35
  • NUM_LOGIC_O5ONLY=16
  • NUM_LOGIC_O6ONLY=76
  • NUM_LUT_RT_DRIVES_CARRY4=1
  • NUM_LUT_RT_EXO6=1
  • NUM_LUT_RT_O6=16
  • NUM_SLICEL=11
  • NUM_SLICEX=43
  • NUM_SLICE_CARRY4=7
  • NUM_SLICE_CONTROLSET=7
  • NUM_SLICE_CYINIT=181
  • NUM_SLICE_F7MUX=4
  • NUM_SLICE_FF=57
  • NUM_SLICE_LATCH=26
  • NUM_SLICE_UNUSEDCTRL=25
  • NUM_UNUSABLE_FF_BELS=29
 		NetStatistics
  • NumNets_Active=228
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=3
  • NumNodesOfType_Active_BOUNCEIN=28
  • NumNodesOfType_Active_BUFGOUT=3
  • NumNodesOfType_Active_BUFHINP2OUT=4
  • NumNodesOfType_Active_CLKPIN=29
  • NumNodesOfType_Active_CLKPINFEED=12
  • NumNodesOfType_Active_CNTRLPIN=31
  • NumNodesOfType_Active_DOUBLE=206
  • NumNodesOfType_Active_GENERIC=40
  • NumNodesOfType_Active_GLOBAL=28
  • NumNodesOfType_Active_INPUT=8
  • NumNodesOfType_Active_IOBIN2OUT=34
  • NumNodesOfType_Active_IOBOUTPUT=34
  • NumNodesOfType_Active_LUTINPUT=499
  • NumNodesOfType_Active_OUTBOUND=184
  • NumNodesOfType_Active_OUTPUT=186
  • NumNodesOfType_Active_PADINPUT=29
  • NumNodesOfType_Active_PADOUTPUT=6
  • NumNodesOfType_Active_PINBOUNCE=107
  • NumNodesOfType_Active_PINFEED=583
  • NumNodesOfType_Active_QUAD=108
  • NumNodesOfType_Active_REGINPUT=25
  • NumNodesOfType_Active_SINGLE=297
  • NumNodesOfType_Vcc_GENERIC=5
  • NumNodesOfType_Vcc_HVCCOUT=30
  • NumNodesOfType_Vcc_IOBIN2OUT=5
  • NumNodesOfType_Vcc_IOBOUTPUT=5
  • NumNodesOfType_Vcc_LUTINPUT=51
  • NumNodesOfType_Vcc_PADINPUT=5
  • NumNodesOfType_Vcc_PINFEED=56
 SiteStatistics
  • BUFG-BUFGMUX=3
  • IOB-IOBM=22
  • IOB-IOBS=18
  • SLICEL-SLICEM=4
  • SLICEX-SLICEL=10
  • SLICEX-SLICEM=8
 		SiteSummary
  • BUFG=3
  • BUFG_BUFG=3
  • CARRY4=7
  • FF_SR=2
  • HARD0=2
  • INVERTER=5
  • IOB=40
  • IOB_IMUX=6
  • IOB_INBUF=6
  • IOB_OUTBUF=34
  • LUT5=51
  • LUT6=128
  • PAD=40
  • REG_SR=81
  • SELMUX2_1=4
  • SLICEL=11
  • SLICEX=43
 
Configuration Data
FF_SR
  • CK=[CK:2] [CK_INV:0]
  • SRINIT=[SRINIT0:2]
  • SYNC_ATTR=[ASYNC:2]
 IOB_OUTBUF
  • DRIVEATTRBOX=[12:34]
  • SLEW=[SLOW:34]
  • SUSPEND=[3STATE:34]
 REG_SR
  • CK=[CK:55] [CK_INV:26]
  • LATCH_OR_FF=[FF:55] [LATCH:26]
  • SRINIT=[SRINIT0:78] [SRINIT1:3]
  • SYNC_ATTR=[ASYNC:81]
 SLICEL
  • CLK=[CLK:6] [CLK_INV:2]
 SLICEX
  • CLK=[CLK:15] [CLK_INV:6]
 
Pin Data
BUFG
  • I0=3
  • O=3
 BUFG_BUFG
  • I0=3
  • O=3
 CARRY4
  • CIN=5
  • CO3=5
  • CYINIT=2
  • DI0=7
  • DI1=6
  • DI2=5
  • DI3=5
  • O0=7
  • O1=7
  • O2=6
  • O3=5
  • S0=7
  • S1=7
  • S2=6
  • S3=5
 FF_SR
  • CK=2
  • D=2
  • Q=2
  • SR=2
 HARD0
  • 0=2
 INVERTER
  • IN=5
  • OUT=5
 IOB
  • I=6
  • O=34
  • PAD=40
 IOB_IMUX
  • I=1
  • I_B=5
  • OUT=6
 IOB_INBUF
  • OUT=6
  • PAD=6
 IOB_OUTBUF
  • IN=34
  • OUT=34
 LUT5
  • A1=9
  • A2=25
  • A3=31
  • A4=31
  • A5=30
  • O5=51
 LUT6
  • A1=33
  • A2=67
  • A3=84
  • A4=121
  • A5=106
  • A6=127
  • O6=128
 PAD
  • PAD=40
 REG_SR
  • CE=24
  • CK=81
  • D=81
  • Q=81
  • SR=55
 SELMUX2_1
  • 0=4
  • 1=4
  • OUT=4
  • S0=4
 SLICEL
  • A1=1
  • A2=2
  • A3=2
  • A4=7
  • A5=2
  • A6=7
  • AQ=7
  • B=4
  • B1=4
  • B2=4
  • B3=4
  • B4=10
  • B5=6
  • B6=10
  • BMUX=1
  • BQ=7
  • BX=2
  • C1=3
  • C2=6
  • C3=6
  • C4=10
  • C5=6
  • C6=10
  • CIN=5
  • CLK=8
  • CMUX=3
  • COUT=5
  • CQ=7
  • CX=5
  • D1=2
  • D2=3
  • D3=5
  • D4=9
  • D5=5
  • D6=9
  • DQ=5
  • DX=1
  • SR=6
 SLICEX
  • A=21
  • A1=6
  • A2=14
  • A3=19
  • A4=27
  • A5=27
  • A6=30
  • AMUX=9
  • AQ=17
  • AX=7
  • B=14
  • B1=10
  • B2=18
  • B3=21
  • B4=21
  • B5=23
  • B6=23
  • BMUX=9
  • BQ=11
  • BX=2
  • C=8
  • C1=8
  • C2=11
  • C3=13
  • C4=17
  • C5=17
  • C6=17
  • CE=10
  • CLK=21
  • CMUX=3
  • CQ=15
  • CX=6
  • D=11
  • D1=5
  • D2=12
  • D3=17
  • D4=20
  • D5=20
  • D6=21
  • DMUX=10
  • DQ=12
  • DX=2
  • SR=15
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 277 272 0 0 0 0 0
bitgen 241 241 0 0 0 0 0
map 239 239 0 0 0 0 0
netgen 1 1 0 0 0 0 0
ngc2edif 3 3 0 0 0 0 0
ngdbuild 253 252 0 0 0 0 0
par 238 238 0 0 0 0 0
trce 238 238 0 0 0 0 0
xps 2 0 0 0 0 0 0
xst 377 365 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/spartan6/libs_le_acc16.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor PROP_intProjectCreationTimestamp=2015-04-30T15:02:17
PROP_intWbtProjectID=A165844EB747482CAFFF04ADD334FD0A PROP_intWbtProjectIteration=2
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_xilxBitgStart_IntDone=true PROP_AutoTop=true
PROP_DevFamily=Spartan6 PROP_DevDevice=xc6slx16
PROP_DevFamilyPMName=spartan6 PROP_DevPackage=csg324
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-3
PROP_PreferredLanguage=Verilog FILE_UCF=1
FILE_VERILOG=9
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=2 NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FDC=30 NGDBUILD_NUM_FDCE=24
NGDBUILD_NUM_FDP=3 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=5 NGDBUILD_NUM_INV=10
NGDBUILD_NUM_LD=26 NGDBUILD_NUM_LUT1=17 NGDBUILD_NUM_LUT2=14 NGDBUILD_NUM_LUT3=22
NGDBUILD_NUM_LUT4=53 NGDBUILD_NUM_LUT5=21 NGDBUILD_NUM_LUT6=30 NGDBUILD_NUM_MUXCY=23
NGDBUILD_NUM_MUXF7=4 NGDBUILD_NUM_OBUF=34 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=25
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=3 NGDBUILD_NUM_FDC=30 NGDBUILD_NUM_FDCE=24 NGDBUILD_NUM_FDP=3
NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=5 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=10
NGDBUILD_NUM_LD=26 NGDBUILD_NUM_LUT1=17 NGDBUILD_NUM_LUT2=14 NGDBUILD_NUM_LUT3=22
NGDBUILD_NUM_LUT4=53 NGDBUILD_NUM_LUT5=21 NGDBUILD_NUM_LUT6=30 NGDBUILD_NUM_MUXCY=23
NGDBUILD_NUM_MUXF7=4 NGDBUILD_NUM_OBUF=34 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=25
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx16-3-csg324
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5