Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx16
Project ID (random number) d96cc176c19a412192bec84ffaf3406b.E351ABAC09C34FC3A90EA5FCB4508244.4 Target Package: csg324
Registration ID 210913348_0_0_143 Target Speed: -3
Date Generated 2015-05-02T23:03:56 Tool Flow ISE
 
User Environment
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz CPU Speed 2494 MHz
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz CPU Speed 2494 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=2
  • 25-bit adder=1
  • 4-bit adder=1
 Counters=3
  • 18-bit up counter=1
  • 2-bit up counter=1
  • 25-bit up counter=1
 Multiplexers=6
  • 1-bit 2-to-1 multiplexer=3
  • 4-bit 2-to-1 multiplexer=2
  • 4-bit 4-to-1 multiplexer=1
 RAMs=3
  • 16x15-bit single-port distributed Read Only RAM=1
  • 4x4-bit single-port distributed Read Only RAM=2
 Registers=45
  • Flip-Flops=45
 Xors=16
  • 1-bit xor2=16
 		MiscellaneousStatistics
  • AGG_BONDED_IO=40
  • AGG_IO=40
  • AGG_LOCED_IO=40
  • AGG_SLICE=53
  • NUM_BONDED_IOB=40
  • NUM_BSFULL=70
  • NUM_BSLUTONLY=74
  • NUM_BSREGONLY=12
  • NUM_BSUSED=156
  • NUM_BUFG=1
  • NUM_LOCED_IOB=40
  • NUM_LOGIC_O5ANDO6=18
  • NUM_LOGIC_O5ONLY=55
  • NUM_LOGIC_O6ONLY=68
  • NUM_LUT_RT_DRIVES_CARRY4=3
  • NUM_LUT_RT_EXO6=3
  • NUM_LUT_RT_O5=1
  • NUM_LUT_RT_O6=55
  • NUM_SLICEL=17
  • NUM_SLICEX=36
  • NUM_SLICE_CARRY4=17
  • NUM_SLICE_CONTROLSET=7
  • NUM_SLICE_CYINIT=221
  • NUM_SLICE_FF=77
  • NUM_SLICE_LATCH=8
  • NUM_SLICE_UNUSEDCTRL=28
  • NUM_UNUSABLE_FF_BELS=27
 		NetStatistics
  • NumNets_Active=229
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=5
  • NumNodesOfType_Active_BOUNCEIN=16
  • NumNodesOfType_Active_BUFGOUT=1
  • NumNodesOfType_Active_BUFHINP2OUT=2
  • NumNodesOfType_Active_CLKPIN=25
  • NumNodesOfType_Active_CLKPINFEED=2
  • NumNodesOfType_Active_CNTRLPIN=24
  • NumNodesOfType_Active_DOUBLE=162
  • NumNodesOfType_Active_GENERIC=41
  • NumNodesOfType_Active_GLOBAL=13
  • NumNodesOfType_Active_INPUT=15
  • NumNodesOfType_Active_IOBIN2OUT=34
  • NumNodesOfType_Active_IOBOUTPUT=34
  • NumNodesOfType_Active_LUTINPUT=373
  • NumNodesOfType_Active_OUTBOUND=183
  • NumNodesOfType_Active_OUTPUT=187
  • NumNodesOfType_Active_PADINPUT=28
  • NumNodesOfType_Active_PADOUTPUT=7
  • NumNodesOfType_Active_PINBOUNCE=80
  • NumNodesOfType_Active_PINFEED=450
  • NumNodesOfType_Active_QUAD=72
  • NumNodesOfType_Active_REGINPUT=12
  • NumNodesOfType_Active_SINGLE=236
  • NumNodesOfType_Vcc_GENERIC=5
  • NumNodesOfType_Vcc_HVCCOUT=34
  • NumNodesOfType_Vcc_IOBIN2OUT=5
  • NumNodesOfType_Vcc_IOBOUTPUT=5
  • NumNodesOfType_Vcc_LUTINPUT=74
  • NumNodesOfType_Vcc_PADINPUT=5
  • NumNodesOfType_Vcc_PINFEED=79
 SiteStatistics
  • BUFG-BUFGMUX=1
  • IOB-IOBM=21
  • IOB-IOBS=19
  • SLICEL-SLICEM=5
  • SLICEX-SLICEL=8
  • SLICEX-SLICEM=7
 		SiteSummary
  • BUFG=1
  • BUFG_BUFG=1
  • CARRY4=17
  • FF_SR=3
  • HARD0=3
  • INVERTER=6
  • IOB=40
  • IOB_IMUX=7
  • IOB_INBUF=7
  • IOB_OUTBUF=33
  • LUT5=74
  • LUT6=144
  • PAD=40
  • REG_SR=82
  • SLICEL=17
  • SLICEX=36
 
Configuration Data
FF_SR
  • CK=[CK:3] [CK_INV:0]
  • SRINIT=[SRINIT0:3]
  • SYNC_ATTR=[ASYNC:3]
 IOB_OUTBUF
  • DRIVEATTRBOX=[12:33]
  • SLEW=[SLOW:33]
  • SUSPEND=[3STATE:33]
 REG_SR
  • CK=[CK:78] [CK_INV:4]
  • LATCH_OR_FF=[FF:74] [LATCH:8]
  • SRINIT=[SRINIT0:82]
  • SYNC_ATTR=[ASYNC:82]
 SLICEL
  • CLK=[CLK:5] [CLK_INV:0]
 SLICEX
  • CLK=[CLK:19] [CLK_INV:1]
 
Pin Data
BUFG
  • I0=1
  • O=1
 BUFG_BUFG
  • I0=1
  • O=1
 CARRY4
  • CIN=14
  • CO3=14
  • CYINIT=3
  • DI0=16
  • DI1=14
  • DI2=14
  • DI3=14
  • O0=15
  • O1=14
  • O2=13
  • O3=13
  • S0=17
  • S1=16
  • S2=14
  • S3=14
 FF_SR
  • CK=3
  • D=3
  • Q=3
  • SR=3
 HARD0
  • 0=3
 INVERTER
  • IN=6
  • OUT=6
 IOB
  • I=7
  • O=33
  • PAD=40
 IOB_IMUX
  • I=1
  • I_B=6
  • OUT=7
 IOB_INBUF
  • OUT=7
  • PAD=7
 IOB_OUTBUF
  • IN=33
  • OUT=33
 LUT5
  • A1=2
  • A2=8
  • A3=9
  • A4=14
  • A5=15
  • O5=74
 LUT6
  • A1=19
  • A2=43
  • A3=47
  • A4=76
  • A5=120
  • A6=142
  • O6=144
 PAD
  • PAD=40
 REG_SR
  • CE=4
  • CK=82
  • D=82
  • Q=82
  • SR=74
 SLICEL
  • A4=5
  • A5=11
  • A6=17
  • AMUX=10
  • AQ=5
  • B4=5
  • B5=10
  • B6=15
  • BMUX=9
  • BQ=5
  • C4=4
  • C5=10
  • C6=14
  • CIN=14
  • CLK=5
  • CMUX=9
  • COUT=14
  • CQ=4
  • D4=4
  • D5=10
  • D6=14
  • DMUX=9
  • DQ=4
  • SR=5
 SLICEX
  • A=12
  • A1=6
  • A2=13
  • A3=15
  • A4=20
  • A5=25
  • A6=26
  • AMUX=6
  • AQ=18
  • AX=3
  • B=9
  • B1=4
  • B2=11
  • B3=12
  • B4=16
  • B5=20
  • B6=22
  • BMUX=6
  • BQ=17
  • BX=3
  • C=3
  • C1=4
  • C2=10
  • C3=10
  • C4=10
  • C5=16
  • C6=16
  • CE=1
  • CLK=20
  • CMUX=1
  • CQ=16
  • CX=3
  • D=8
  • D1=5
  • D2=9
  • D3=10
  • D4=12
  • D5=18
  • D6=18
  • DMUX=3
  • DQ=13
  • DX=3
  • SR=18
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 297 290 0 0 0 0 0
bitgen 258 258 0 0 0 0 0
map 257 257 0 0 0 0 0
netgen 1 1 0 0 0 0 0
ngc2edif 4 4 0 0 0 0 0
ngdbuild 273 271 0 0 0 0 0
par 256 256 0 0 0 0 0
trce 255 255 0 0 0 0 0
xps 2 0 0 0 0 0 0
xst 399 386 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/spartan6/libs_le_acc16.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor PROP_intProjectCreationTimestamp=2015-04-17T02:13:13
PROP_intWbtProjectID=E351ABAC09C34FC3A90EA5FCB4508244 PROP_intWbtProjectIteration=4
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_xilxBitgStart_IntDone=true PROP_AutoTop=true
PROP_DevFamily=Spartan6 PROP_DevDevice=xc6slx16
PROP_DevFamilyPMName=spartan6 PROP_DevPackage=csg324
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-3
PROP_PreferredLanguage=Verilog FILE_UCF=1
FILE_VERILOG=11
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FDC=73 NGDBUILD_NUM_FDCE=4 NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=6 NGDBUILD_NUM_INV=10 NGDBUILD_NUM_LD=4 NGDBUILD_NUM_LD_1=4
NGDBUILD_NUM_LUT1=58 NGDBUILD_NUM_LUT2=42 NGDBUILD_NUM_LUT3=1 NGDBUILD_NUM_LUT4=15
NGDBUILD_NUM_LUT5=23 NGDBUILD_NUM_LUT6=16 NGDBUILD_NUM_MUXCY=58 NGDBUILD_NUM_OBUF=33
NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=55
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FDC=73 NGDBUILD_NUM_FDCE=4 NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=6 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=10 NGDBUILD_NUM_LD=4
NGDBUILD_NUM_LD_1=4 NGDBUILD_NUM_LUT1=58 NGDBUILD_NUM_LUT2=42 NGDBUILD_NUM_LUT3=1
NGDBUILD_NUM_LUT4=15 NGDBUILD_NUM_LUT5=23 NGDBUILD_NUM_LUT6=16 NGDBUILD_NUM_MUXCY=58
NGDBUILD_NUM_OBUF=33 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=55
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx16-3-csg324
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5