Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx16
Project ID (random number) d96cc176c19a412192bec84ffaf3406b.1AD2C2990A7D46E997C4C36D842A5D24.12 Target Package: csg324
Registration ID 210913348_0_0_143 Target Speed: -3
Date Generated 2015-06-04T02:03:13 Tool Flow ISE
 
User Environment
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz CPU Speed 2494 MHz
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz CPU Speed 2494 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=12
  • 4-bit adder=2
  • 4-bit subtractor=1
  • 7-bit subtractor=1
  • 8-bit adder=1
  • 8-bit subtractor=1
  • 9-bit subtractor=6
 Comparators=3
  • 14-bit comparator greater=1
  • 4-bit comparator greater=1
  • 8-bit comparator greater=1
 Counters=8
  • 14-bit up counter=1
  • 18-bit up counter=1
  • 21-bit up counter=1
  • 25-bit up counter=1
  • 3-bit up counter=1
  • 4-bit up counter=1
  • 6-bit up counter=1
  • 9-bit up counter=1
 FSMs=2 Multiplexers=557
  • 1-bit 2-to-1 multiplexer=11
  • 1-bit 512-to-1 multiplexer=8
  • 10-bit 2-to-1 multiplexer=2
  • 10-bit 3-to-1 multiplexer=1
  • 11-bit 2-to-1 multiplexer=1
  • 12-bit 2-to-1 multiplexer=1
  • 13-bit 2-to-1 multiplexer=1
  • 14-bit 2-to-1 multiplexer=1
  • 15-bit 2-to-1 multiplexer=1
  • 16-bit 2-to-1 multiplexer=1
  • 17-bit 2-to-1 multiplexer=1
  • 18-bit 2-to-1 multiplexer=1
  • 19-bit 2-to-1 multiplexer=1
  • 2-bit 2-to-1 multiplexer=1
  • 20-bit 2-to-1 multiplexer=1
  • 21-bit 2-to-1 multiplexer=1
  • 22-bit 2-to-1 multiplexer=1
  • 23-bit 2-to-1 multiplexer=1
  • 24-bit 2-to-1 multiplexer=1
  • 25-bit 2-to-1 multiplexer=1
  • 26-bit 2-to-1 multiplexer=1
  • 27-bit 2-to-1 multiplexer=1
  • 28-bit 2-to-1 multiplexer=1
  • 29-bit 2-to-1 multiplexer=1
  • 3-bit 2-to-1 multiplexer=1
  • 30-bit 2-to-1 multiplexer=1
  • 31-bit 2-to-1 multiplexer=1
  • 32-bit 2-to-1 multiplexer=1
  • 33-bit 2-to-1 multiplexer=1
  • 34-bit 2-to-1 multiplexer=1
  • 35-bit 2-to-1 multiplexer=1
  • 36-bit 2-to-1 multiplexer=1
  • 37-bit 2-to-1 multiplexer=1
  • 38-bit 2-to-1 multiplexer=1
  • 39-bit 2-to-1 multiplexer=1
  • 4-bit 2-to-1 multiplexer=7
  • 40-bit 2-to-1 multiplexer=1
  • 41-bit 2-to-1 multiplexer=1
  • 42-bit 2-to-1 multiplexer=1
  • 43-bit 2-to-1 multiplexer=1
  • 44-bit 2-to-1 multiplexer=1
  • 45-bit 2-to-1 multiplexer=1
  • 46-bit 2-to-1 multiplexer=1
  • 47-bit 2-to-1 multiplexer=1
  • 48-bit 2-to-1 multiplexer=1
  • 49-bit 2-to-1 multiplexer=1
  • 5-bit 2-to-1 multiplexer=1
  • 50-bit 2-to-1 multiplexer=1
  • 51-bit 2-to-1 multiplexer=1
  • 52-bit 2-to-1 multiplexer=1
  • 53-bit 2-to-1 multiplexer=1
  • 54-bit 2-to-1 multiplexer=1
  • 55-bit 2-to-1 multiplexer=1
  • 56-bit 2-to-1 multiplexer=1
  • 57-bit 2-to-1 multiplexer=1
  • 58-bit 2-to-1 multiplexer=1
  • 59-bit 2-to-1 multiplexer=1
  • 6-bit 2-to-1 multiplexer=1
  • 60-bit 2-to-1 multiplexer=1
  • 61-bit 2-to-1 multiplexer=1
  • 62-bit 2-to-1 multiplexer=1
  • 63-bit 2-to-1 multiplexer=1
  • 64-bit 2-to-1 multiplexer=449
  • 7-bit 2-to-1 multiplexer=1
  • 8-bit 2-to-1 multiplexer=20
  • 9-bit 2-to-1 multiplexer=1
 Registers=552
  • Flip-Flops=552
 		MiscellaneousStatistics
  • AGG_BONDED_IO=18
  • AGG_IO=18
  • AGG_LOCED_IO=18
  • AGG_SLICE=270
  • NUM_BONDED_IOB=18
  • NUM_BSFULL=599
  • NUM_BSLUTONLY=288
  • NUM_BSREGONLY=4
  • NUM_BSUSED=891
  • NUM_BUFG=2
  • NUM_LOCED_IOB=18
  • NUM_LOGIC_O5ANDO6=52
  • NUM_LOGIC_O5ONLY=25
  • NUM_LOGIC_O6ONLY=809
  • NUM_LUT_RT_DRIVES_CARRY4=1
  • NUM_LUT_RT_EXO6=1
  • NUM_LUT_RT_O5=1
  • NUM_LUT_RT_O6=25
  • NUM_RAMB16BWER=4
  • NUM_SLICEL=15
  • NUM_SLICEX=255
  • NUM_SLICE_CARRY4=14
  • NUM_SLICE_CONTROLSET=9
  • NUM_SLICE_CYINIT=966
  • NUM_SLICE_F7MUX=1
  • NUM_SLICE_FF=622
  • NUM_SLICE_UNUSEDCTRL=100
  • NUM_UNUSABLE_FF_BELS=34
  • Xilinx Core blk_mem_gen_v7_3, Xilinx CORE Generator 14.7=1
 		NetStatistics
  • NumNets_Active=1038
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=25
  • NumNodesOfType_Active_BOUNCEIN=159
  • NumNodesOfType_Active_BUFGOUT=2
  • NumNodesOfType_Active_BUFHINP2OUT=6
  • NumNodesOfType_Active_CLKPIN=170
  • NumNodesOfType_Active_CLKPINFEED=10
  • NumNodesOfType_Active_CNTRLPIN=314
  • NumNodesOfType_Active_DOUBLE=1503
  • NumNodesOfType_Active_GENERIC=16
  • NumNodesOfType_Active_GLOBAL=61
  • NumNodesOfType_Active_INPUT=57
  • NumNodesOfType_Active_IOBIN2OUT=14
  • NumNodesOfType_Active_IOBOUTPUT=14
  • NumNodesOfType_Active_LUTINPUT=4974
  • NumNodesOfType_Active_OUTBOUND=1075
  • NumNodesOfType_Active_OUTPUT=1041
  • NumNodesOfType_Active_PADINPUT=13
  • NumNodesOfType_Active_PADOUTPUT=2
  • NumNodesOfType_Active_PINBOUNCE=683
  • NumNodesOfType_Active_PINFEED=5370
  • NumNodesOfType_Active_QUAD=599
  • NumNodesOfType_Active_REGINPUT=9
  • NumNodesOfType_Active_SINGLE=2071
  • NumNodesOfType_Gnd_BOUNCEIN=54
  • NumNodesOfType_Gnd_DOUBLE=2
  • NumNodesOfType_Gnd_GENERIC=1
  • NumNodesOfType_Gnd_HGNDOUT=20
  • NumNodesOfType_Gnd_INPUT=416
  • NumNodesOfType_Gnd_IOBIN2OUT=1
  • NumNodesOfType_Gnd_IOBOUTPUT=1
  • NumNodesOfType_Gnd_OUTBOUND=3
  • NumNodesOfType_Gnd_OUTPUT=4
  • NumNodesOfType_Gnd_PADINPUT=1
  • NumNodesOfType_Gnd_PINBOUNCE=112
  • NumNodesOfType_Gnd_PINFEED=373
  • NumNodesOfType_Gnd_REGINPUT=12
  • NumNodesOfType_Gnd_SINGLE=2
  • NumNodesOfType_Vcc_GENERIC=2
  • NumNodesOfType_Vcc_HVCCOUT=37
  • NumNodesOfType_Vcc_INPUT=4
  • NumNodesOfType_Vcc_IOBIN2OUT=2
  • NumNodesOfType_Vcc_IOBOUTPUT=2
  • NumNodesOfType_Vcc_LUTINPUT=78
  • NumNodesOfType_Vcc_PADINPUT=2
  • NumNodesOfType_Vcc_PINFEED=84
 SiteStatistics
  • BUFG-BUFGMUX=2
  • IOB-IOBM=9
  • IOB-IOBS=9
  • SLICEL-SLICEM=11
  • SLICEX-SLICEL=73
  • SLICEX-SLICEM=59
 		SiteSummary
  • BUFG=2
  • BUFG_BUFG=2
  • CARRY4=14
  • FF_SR=21
  • HARD0=1
  • IOB=18
  • IOB_IMUX=2
  • IOB_INBUF=2
  • IOB_OUTBUF=16
  • LUT5=78
  • LUT6=887
  • PAD=18
  • RAMB16BWER=4
  • RAMB16BWER_RAMB16BWER=4
  • REG_SR=601
  • SELMUX2_1=1
  • SLICEL=15
  • SLICEX=255
 
Configuration Data
FF_SR
  • CK=[CK:21] [CK_INV:0]
  • SRINIT=[SRINIT0:21]
  • SYNC_ATTR=[ASYNC:21]
 IOB_OUTBUF
  • DRIVEATTRBOX=[12:16]
  • SLEW=[SLOW:16]
  • SUSPEND=[3STATE:16]
 RAMB16BWER
  • CLKA=[CLKA_INV:0] [CLKA:4]
  • CLKB=[CLKB_INV:0] [CLKB:4]
  • ENA=[ENA_INV:0] [ENA:4]
  • ENB=[ENB_INV:0] [ENB:4]
  • REGCEA=[REGCEA_INV:0] [REGCEA:4]
  • REGCEB=[REGCEB_INV:0] [REGCEB:4]
  • RSTA=[RSTA:4] [RSTA_INV:0]
  • RSTB=[RSTB:4] [RSTB_INV:0]
  • WEA0=[WEA0:4] [WEA0_INV:0]
  • WEA1=[WEA1:4] [WEA1_INV:0]
  • WEA2=[WEA2:4] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:4]
  • WEB0=[WEB0:4] [WEB0_INV:0]
  • WEB1=[WEB1:4] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:4]
  • WEB3=[WEB3:4] [WEB3_INV:0]
 RAMB16BWER_RAMB16BWER
  • CLKA=[CLKA_INV:0] [CLKA:4]
  • CLKB=[CLKB_INV:0] [CLKB:4]
  • DATA_WIDTH_A=[18:4]
  • DATA_WIDTH_B=[18:4]
  • DOA_REG=[0:4]
  • DOB_REG=[0:4]
  • ENA=[ENA_INV:0] [ENA:4]
  • ENB=[ENB_INV:0] [ENB:4]
  • EN_RSTRAM_A=[FALSE:4]
  • EN_RSTRAM_B=[FALSE:4]
  • RAM_MODE=[TDP:4]
  • REGCEA=[REGCEA_INV:0] [REGCEA:4]
  • REGCEB=[REGCEB_INV:0] [REGCEB:4]
  • RSTA=[RSTA:4] [RSTA_INV:0]
  • RSTB=[RSTB:4] [RSTB_INV:0]
  • RSTTYPE=[SYNC:4]
  • RST_PRIORITY_A=[CE:4]
  • RST_PRIORITY_B=[CE:4]
  • WEA0=[WEA0:4] [WEA0_INV:0]
  • WEA1=[WEA1:4] [WEA1_INV:0]
  • WEA2=[WEA2:4] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:4]
  • WEB0=[WEB0:4] [WEB0_INV:0]
  • WEB1=[WEB1:4] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:4]
  • WEB3=[WEB3:4] [WEB3_INV:0]
  • WRITE_MODE_A=[WRITE_FIRST:4]
  • WRITE_MODE_B=[WRITE_FIRST:4]
 REG_SR
  • CK=[CK:601] [CK_INV:0]
  • LATCH_OR_FF=[FF:601]
  • SRINIT=[SRINIT0:601]
  • SYNC_ATTR=[ASYNC:601]
 SLICEL
  • CLK=[CLK:8] [CLK_INV:0]
 SLICEX
  • CLK=[CLK:162] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=2
  • O=2
 BUFG_BUFG
  • I0=2
  • O=2
 CARRY4
  • CIN=11
  • CO3=11
  • CYINIT=3
  • DI0=12
  • DI1=11
  • DI2=11
  • DI3=11
  • O0=14
  • O1=12
  • O2=11
  • O3=11
  • S0=14
  • S1=12
  • S2=11
  • S3=11
 FF_SR
  • CE=5
  • CK=21
  • D=21
  • Q=21
  • SR=21
 HARD0
  • 0=1
 IOB
  • I=2
  • O=16
  • PAD=18
 IOB_IMUX
  • I=2
  • OUT=2
 IOB_INBUF
  • OUT=2
  • PAD=2
 IOB_OUTBUF
  • IN=16
  • OUT=16
 LUT5
  • A1=23
  • A2=20
  • A3=41
  • A4=32
  • A5=25
  • O5=78
 LUT6
  • A1=770
  • A2=797
  • A3=821
  • A4=853
  • A5=879
  • A6=886
  • O6=887
 PAD
  • PAD=18
 RAMB16BWER
  • ADDRA0=4
  • ADDRA1=4
  • ADDRA10=4
  • ADDRA11=4
  • ADDRA12=4
  • ADDRA13=4
  • ADDRA2=4
  • ADDRA3=4
  • ADDRA4=4
  • ADDRA5=4
  • ADDRA6=4
  • ADDRA7=4
  • ADDRA8=4
  • ADDRA9=4
  • ADDRB0=4
  • ADDRB1=4
  • ADDRB10=4
  • ADDRB11=4
  • ADDRB12=4
  • ADDRB13=4
  • ADDRB2=4
  • ADDRB3=4
  • ADDRB4=4
  • ADDRB5=4
  • ADDRB6=4
  • ADDRB7=4
  • ADDRB8=4
  • ADDRB9=4
  • CLKA=4
  • CLKB=4
  • DIA0=4
  • DIA1=4
  • DIA10=4
  • DIA11=4
  • DIA12=4
  • DIA13=4
  • DIA14=4
  • DIA15=4
  • DIA16=4
  • DIA17=4
  • DIA18=4
  • DIA19=4
  • DIA2=4
  • DIA20=4
  • DIA21=4
  • DIA22=4
  • DIA23=4
  • DIA24=4
  • DIA25=4
  • DIA26=4
  • DIA27=4
  • DIA28=4
  • DIA29=4
  • DIA3=4
  • DIA30=4
  • DIA31=4
  • DIA4=4
  • DIA5=4
  • DIA6=4
  • DIA7=4
  • DIA8=4
  • DIA9=4
  • DIB0=4
  • DIB1=4
  • DIB10=4
  • DIB11=4
  • DIB12=4
  • DIB13=4
  • DIB14=4
  • DIB15=4
  • DIB16=4
  • DIB17=4
  • DIB18=4
  • DIB19=4
  • DIB2=4
  • DIB20=4
  • DIB21=4
  • DIB22=4
  • DIB23=4
  • DIB24=4
  • DIB25=4
  • DIB26=4
  • DIB27=4
  • DIB28=4
  • DIB29=4
  • DIB3=4
  • DIB30=4
  • DIB31=4
  • DIB4=4
  • DIB5=4
  • DIB6=4
  • DIB7=4
  • DIB8=4
  • DIB9=4
  • DIPA0=4
  • DIPA1=4
  • DIPA2=4
  • DIPA3=4
  • DIPB0=4
  • DIPB1=4
  • DIPB2=4
  • DIPB3=4
  • DOA0=4
  • DOA1=4
  • DOA10=4
  • DOA11=4
  • DOA12=4
  • DOA13=3
  • DOA14=3
  • DOA15=3
  • DOA2=4
  • DOA3=4
  • DOA4=4
  • DOA5=3
  • DOA6=3
  • DOA7=3
  • DOA8=4
  • DOA9=4
  • DOPA0=3
  • DOPA1=3
  • ENA=4
  • ENB=4
  • REGCEA=4
  • REGCEB=4
  • RSTA=4
  • RSTB=4
  • WEA0=4
  • WEA1=4
  • WEA2=4
  • WEA3=4
  • WEB0=4
  • WEB1=4
  • WEB2=4
  • WEB3=4
 RAMB16BWER_RAMB16BWER
  • ADDRA0=4
  • ADDRA1=4
  • ADDRA10=4
  • ADDRA11=4
  • ADDRA12=4
  • ADDRA13=4
  • ADDRA2=4
  • ADDRA3=4
  • ADDRA4=4
  • ADDRA5=4
  • ADDRA6=4
  • ADDRA7=4
  • ADDRA8=4
  • ADDRA9=4
  • ADDRB0=4
  • ADDRB1=4
  • ADDRB10=4
  • ADDRB11=4
  • ADDRB12=4
  • ADDRB13=4
  • ADDRB2=4
  • ADDRB3=4
  • ADDRB4=4
  • ADDRB5=4
  • ADDRB6=4
  • ADDRB7=4
  • ADDRB8=4
  • ADDRB9=4
  • CLKA=4
  • CLKB=4
  • DIA0=4
  • DIA1=4
  • DIA10=4
  • DIA11=4
  • DIA12=4
  • DIA13=4
  • DIA14=4
  • DIA15=4
  • DIA16=4
  • DIA17=4
  • DIA18=4
  • DIA19=4
  • DIA2=4
  • DIA20=4
  • DIA21=4
  • DIA22=4
  • DIA23=4
  • DIA24=4
  • DIA25=4
  • DIA26=4
  • DIA27=4
  • DIA28=4
  • DIA29=4
  • DIA3=4
  • DIA30=4
  • DIA31=4
  • DIA4=4
  • DIA5=4
  • DIA6=4
  • DIA7=4
  • DIA8=4
  • DIA9=4
  • DIB0=4
  • DIB1=4
  • DIB10=4
  • DIB11=4
  • DIB12=4
  • DIB13=4
  • DIB14=4
  • DIB15=4
  • DIB16=4
  • DIB17=4
  • DIB18=4
  • DIB19=4
  • DIB2=4
  • DIB20=4
  • DIB21=4
  • DIB22=4
  • DIB23=4
  • DIB24=4
  • DIB25=4
  • DIB26=4
  • DIB27=4
  • DIB28=4
  • DIB29=4
  • DIB3=4
  • DIB30=4
  • DIB31=4
  • DIB4=4
  • DIB5=4
  • DIB6=4
  • DIB7=4
  • DIB8=4
  • DIB9=4
  • DIPA0=4
  • DIPA1=4
  • DIPA2=4
  • DIPA3=4
  • DIPB0=4
  • DIPB1=4
  • DIPB2=4
  • DIPB3=4
  • DOA0=4
  • DOA1=4
  • DOA10=4
  • DOA11=4
  • DOA12=4
  • DOA13=3
  • DOA14=3
  • DOA15=3
  • DOA2=4
  • DOA3=4
  • DOA4=4
  • DOA5=3
  • DOA6=3
  • DOA7=3
  • DOA8=4
  • DOA9=4
  • DOPA0=3
  • DOPA1=3
  • ENA=4
  • ENB=4
  • REGCEA=4
  • REGCEB=4
  • RSTA=4
  • RSTB=4
  • WEA0=4
  • WEA1=4
  • WEA2=4
  • WEA3=4
  • WEB0=4
  • WEB1=4
  • WEB2=4
  • WEB3=4
 REG_SR
  • CE=550
  • CK=601
  • D=601
  • Q=601
  • SR=601
 SELMUX2_1
  • 0=1
  • 1=1
  • OUT=1
  • S0=1
 SLICEL
  • A=1
  • A1=3
  • A2=3
  • A3=3
  • A4=7
  • A5=13
  • A6=15
  • AMUX=7
  • AQ=7
  • AX=4
  • B=1
  • B1=3
  • B2=5
  • B3=5
  • B4=7
  • B5=12
  • B6=13
  • BMUX=6
  • BQ=6
  • BX=3
  • C1=4
  • C2=5
  • C3=5
  • C4=6
  • C5=12
  • C6=12
  • CE=4
  • CIN=11
  • CLK=8
  • CMUX=6
  • COUT=11
  • CQ=6
  • CX=4
  • D1=5
  • D2=5
  • D3=5
  • D4=6
  • D5=12
  • D6=12
  • DMUX=6
  • DQ=5
  • DX=4
  • SR=8
 SLICEX
  • A=89
  • A1=218
  • A2=228
  • A3=237
  • A4=237
  • A5=237
  • A6=238
  • AMUX=13
  • AQ=154
  • AX=3
  • B=67
  • B1=193
  • B2=196
  • B3=204
  • B4=204
  • B5=205
  • B6=207
  • BMUX=14
  • BQ=141
  • BX=1
  • C=50
  • C1=176
  • C2=178
  • C3=187
  • C4=190
  • C5=191
  • C6=192
  • CE=140
  • CLK=162
  • CMUX=8
  • CQ=144
  • CX=1
  • D=62
  • D1=185
  • D2=188
  • D3=193
  • D4=196
  • D5=197
  • D6=197
  • DMUX=10
  • DQ=138
  • DX=1
  • SR=162
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 492 479 0 0 0 0 0
bitgen 426 426 0 0 0 0 0
map 435 424 0 0 0 0 0
netgen 1 1 0 0 0 0 0
ngc2edif 7 7 0 0 0 0 0
ngcbuild 18 18 0 0 0 0 0
ngdbuild 459 454 0 0 0 0 0
par 422 422 0 0 0 0 0
trce 420 420 0 0 0 0 0
xps 2 0 0 0 0 0 0
xst 703 675 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/ite_c_overview.htm ( 2 ) /doc/usenglish/isehelp/spartan6/libs_le_acc16.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_LastAppliedGoal=Balanced
PROP_LastAppliedStrategy=Xilinx Default (unlocked) PROP_ManualCompileOrderImp=false
PROP_PropSpecInProjFile=Store all values PROP_Simulator=ISim (VHDL/Verilog)
PROP_SynthTopFile=changed PROP_Top_Level_Module_Type=HDL
PROP_UseSmartGuide=false PROP_intProjectCreationTimestamp=2015-05-28T16:45:45
PROP_intWbtProjectID=1AD2C2990A7D46E997C4C36D842A5D24 PROP_intWbtProjectIteration=12
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_xilxBitgStart_IntDone=true PROP_AutoTop=true
PROP_DevFamily=Spartan6 PROP_DevDevice=xc6slx16
PROP_DevFamilyPMName=spartan6 PROP_DevPackage=csg324
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-3
PROP_PreferredLanguage=Verilog FILE_COREGEN=1
FILE_UCF=1 FILE_VERILOG=5
 
Core Statistics
Core Type=blk_mem_gen_v7_3
c_addra_width=10 c_addrb_width=10 c_algorithm=1 c_axi_id_width=4
c_axi_slave_type=0 c_axi_type=1 c_byte_size=9 c_common_clk=0
c_default_data=0 c_disable_warn_bhv_coll=0 c_disable_warn_bhv_range=0 c_elaboration_dir=masked_value
c_enable_32bit_address=0 c_family=spartan6 c_has_axi_id=0 c_has_ena=0
c_has_enb=0 c_has_injecterr=0 c_has_mem_output_regs_a=0 c_has_mem_output_regs_b=0
c_has_mux_output_regs_a=0 c_has_mux_output_regs_b=0 c_has_regcea=0 c_has_regceb=0
c_has_rsta=0 c_has_rstb=0 c_has_softecc_input_regs_a=0 c_has_softecc_output_regs_b=0
c_init_file=BlankString c_init_file_name=fname.mif c_inita_val=0 c_initb_val=0
c_interface_type=0 c_load_init_file=1 c_mem_type=3 c_mux_pipeline_stages=0
c_prim_type=1 c_read_depth_a=1024 c_read_depth_b=1024 c_read_width_a=64
c_read_width_b=64 c_rst_priority_a=CE c_rst_priority_b=CE c_rst_type=SYNC
c_rstram_a=0 c_rstram_b=0 c_sim_collision_check=ALL c_use_bram_block=0
c_use_byte_wea=0 c_use_byte_web=0 c_use_default_data=0 c_use_ecc=0
c_use_softecc=0 c_wea_width=1 c_web_width=1 c_write_depth_a=1024
c_write_depth_b=1024 c_write_mode_a=WRITE_FIRST c_write_mode_b=WRITE_FIRST c_write_width_a=64
c_write_width_b=64 c_xdevicefamily=spartan6
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FDC=67 NGDBUILD_NUM_FDCE=555
NGDBUILD_NUM_GND=2 NGDBUILD_NUM_IBUF=1 NGDBUILD_NUM_INV=5 NGDBUILD_NUM_LUT1=25
NGDBUILD_NUM_LUT2=45 NGDBUILD_NUM_LUT3=22 NGDBUILD_NUM_LUT4=42 NGDBUILD_NUM_LUT5=28
NGDBUILD_NUM_LUT6=763 NGDBUILD_NUM_MUXCY=45 NGDBUILD_NUM_MUXF7=1 NGDBUILD_NUM_OBUF=16
NGDBUILD_NUM_RAMB16BWER=4 NGDBUILD_NUM_VCC=2 NGDBUILD_NUM_XORCY=48
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=2 NGDBUILD_NUM_FDC=67 NGDBUILD_NUM_FDCE=555 NGDBUILD_NUM_GND=2
NGDBUILD_NUM_IBUF=1 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=5 NGDBUILD_NUM_LUT1=25
NGDBUILD_NUM_LUT2=45 NGDBUILD_NUM_LUT3=22 NGDBUILD_NUM_LUT4=42 NGDBUILD_NUM_LUT5=28
NGDBUILD_NUM_LUT6=763 NGDBUILD_NUM_MUXCY=45 NGDBUILD_NUM_MUXF7=1 NGDBUILD_NUM_OBUF=16
NGDBUILD_NUM_RAMB16BWER=4 NGDBUILD_NUM_VCC=2 NGDBUILD_NUM_XORCY=48
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx16-3-csg324
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -sd=<No customer specific name> -write_timing_constraints=NO
-cross_clock_analysis=NO -bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100
-dsp_utilization_ratio=100 -reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto
-safe_implementation=No -fsm_style=LUT -ram_extract=Yes -ram_style=Auto
-rom_extract=Yes -shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO
-resource_sharing=YES -async_to_sync=NO -use_dsp48=Auto -iobuf=YES
-max_fanout=100000 -bufg=16 -register_duplication=YES -register_balancing=No
-optimize_primitives=NO -use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto
-iob=Auto -equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5