Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx16
Project ID (random number) d96cc176c19a412192bec84ffaf3406b.6C1C931C925644C79CFED3D708539C04.5 Target Package: csg324
Registration ID 210913348_0_0_143 Target Speed: -3
Date Generated 2015-05-26T01:02:29 Tool Flow ISE
 
User Environment
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz CPU Speed 2494 MHz
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz CPU Speed 2494 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=1
  • 7-bit adder=1
 Comparators=1
  • 20-bit comparator equal=1
 Counters=5
  • 18-bit up counter=1
  • 20-bit up counter=1
  • 25-bit up counter=1
  • 4-bit up counter=2
 Multiplexers=1
  • 1-bit 32-to-1 multiplexer=1
 RAMs=1
  • 16x20-bit single-port distributed Read Only RAM=1
 Registers=11
  • Flip-Flops=11
 		MiscellaneousStatistics
  • AGG_BONDED_IO=7
  • AGG_IO=7
  • AGG_LOCED_IO=7
  • AGG_SLICE=33
  • NUM_BONDED_IOB=7
  • NUM_BSFULL=56
  • NUM_BSLUTONLY=47
  • NUM_BSUSED=103
  • NUM_BUFG=1
  • NUM_LOCED_IOB=7
  • NUM_LOGIC_O5ANDO6=34
  • NUM_LOGIC_O5ONLY=23
  • NUM_LOGIC_O6ONLY=45
  • NUM_LUT_RT_DRIVES_CARRY4=1
  • NUM_LUT_RT_EXO6=1
  • NUM_LUT_RT_O6=23
  • NUM_SLICEL=14
  • NUM_SLICEX=19
  • NUM_SLICE_CARRY4=14
  • NUM_SLICE_CONTROLSET=3
  • NUM_SLICE_CYINIT=162
  • NUM_SLICE_FF=59
  • NUM_SLICE_UNUSEDCTRL=16
  • NUM_UNUSABLE_FF_BELS=13
 		NetStatistics
  • NumNets_Active=131
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=1
  • NumNodesOfType_Active_BOUNCEIN=13
  • NumNodesOfType_Active_BUFGOUT=1
  • NumNodesOfType_Active_BUFHINP2OUT=3
  • NumNodesOfType_Active_CLKPIN=17
  • NumNodesOfType_Active_CLKPINFEED=3
  • NumNodesOfType_Active_CNTRLPIN=17
  • NumNodesOfType_Active_DOUBLE=64
  • NumNodesOfType_Active_GENERIC=8
  • NumNodesOfType_Active_GLOBAL=15
  • NumNodesOfType_Active_INPUT=13
  • NumNodesOfType_Active_IOBIN2OUT=6
  • NumNodesOfType_Active_IOBOUTPUT=6
  • NumNodesOfType_Active_LUTINPUT=249
  • NumNodesOfType_Active_OUTBOUND=113
  • NumNodesOfType_Active_OUTPUT=124
  • NumNodesOfType_Active_PADINPUT=4
  • NumNodesOfType_Active_PADOUTPUT=2
  • NumNodesOfType_Active_PINBOUNCE=36
  • NumNodesOfType_Active_PINFEED=288
  • NumNodesOfType_Active_QUAD=32
  • NumNodesOfType_Active_SINGLE=118
  • NumNodesOfType_Vcc_GENERIC=1
  • NumNodesOfType_Vcc_HVCCOUT=17
  • NumNodesOfType_Vcc_IOBIN2OUT=1
  • NumNodesOfType_Vcc_IOBOUTPUT=1
  • NumNodesOfType_Vcc_KVCCOUT=2
  • NumNodesOfType_Vcc_LUTINPUT=57
  • NumNodesOfType_Vcc_PADINPUT=1
  • NumNodesOfType_Vcc_PINBOUNCE=6
  • NumNodesOfType_Vcc_PINFEED=58
  • NumNodesOfType_Vcc_REGINPUT=6
 SiteStatistics
  • BUFG-BUFGMUX=1
  • IOB-IOBM=3
  • IOB-IOBS=4
  • SLICEL-SLICEM=7
  • SLICEX-SLICEL=3
  • SLICEX-SLICEM=3
 		SiteSummary
  • BUFG=1
  • BUFG_BUFG=1
  • CARRY4=14
  • FF_SR=4
  • HARD0=2
  • INVERTER=1
  • IOB=7
  • IOB_IMUX=2
  • IOB_INBUF=2
  • IOB_OUTBUF=5
  • LUT5=57
  • LUT6=103
  • PAD=7
  • REG_SR=55
  • SLICEL=14
  • SLICEX=19
 
Configuration Data
FF_SR
  • CK=[CK:4] [CK_INV:0]
  • SRINIT=[SRINIT0:4]
  • SYNC_ATTR=[ASYNC:4]
 IOB_OUTBUF
  • DRIVEATTRBOX=[12:5]
  • SLEW=[SLOW:5]
  • SUSPEND=[3STATE:5]
 REG_SR
  • CK=[CK:55] [CK_INV:0]
  • LATCH_OR_FF=[FF:55]
  • SRINIT=[SRINIT0:55]
  • SYNC_ATTR=[ASYNC:55]
 SLICEL
  • CLK=[CLK:5] [CLK_INV:0]
 SLICEX
  • CLK=[CLK:12] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=1
  • O=1
 BUFG_BUFG
  • I0=1
  • O=1
 CARRY4
  • CIN=12
  • CO2=1
  • CO3=12
  • CYINIT=2
  • DI0=13
  • DI1=13
  • DI2=13
  • DI3=11
  • O0=12
  • O1=11
  • O2=11
  • O3=11
  • S0=14
  • S1=13
  • S2=13
  • S3=13
 FF_SR
  • CK=4
  • D=4
  • Q=4
  • SR=4
 HARD0
  • 0=2
 INVERTER
  • IN=1
  • OUT=1
 IOB
  • I=2
  • O=5
  • PAD=7
 IOB_IMUX
  • I=1
  • I_B=1
  • OUT=2
 IOB_INBUF
  • OUT=2
  • PAD=2
 IOB_OUTBUF
  • IN=5
  • OUT=5
 LUT5
  • A1=2
  • A2=12
  • A3=13
  • A4=11
  • A5=12
  • O5=57
 LUT6
  • A1=11
  • A2=21
  • A3=24
  • A4=51
  • A5=94
  • A6=99
  • O6=103
 PAD
  • PAD=7
 REG_SR
  • CK=55
  • D=55
  • Q=55
  • SR=55
 SLICEL
  • A1=2
  • A2=2
  • A3=2
  • A4=7
  • A5=13
  • A6=14
  • AMUX=7
  • AQ=5
  • AX=2
  • B1=2
  • B2=2
  • B3=2
  • B4=7
  • B5=13
  • B6=13
  • BMUX=6
  • BQ=5
  • BX=2
  • C1=1
  • C2=1
  • C3=1
  • C4=6
  • C5=13
  • C6=13
  • CIN=12
  • CLK=5
  • CMUX=7
  • COUT=12
  • CQ=5
  • CX=1
  • D1=1
  • D2=1
  • D3=1
  • D4=6
  • D5=11
  • D6=12
  • DMUX=6
  • DQ=5
  • DX=1
  • SR=5
 SLICEX
  • A=6
  • A1=3
  • A2=6
  • A3=7
  • A4=10
  • A5=14
  • A6=15
  • AMUX=4
  • AQ=11
  • B=4
  • B1=1
  • B2=5
  • B3=5
  • B4=7
  • B5=11
  • B6=12
  • BMUX=4
  • BQ=9
  • C=3
  • C1=2
  • C2=4
  • C3=4
  • C4=4
  • C5=10
  • C6=10
  • CLK=12
  • CMUX=3
  • CQ=7
  • D=2
  • D1=1
  • D2=3
  • D3=3
  • D4=4
  • D5=9
  • D6=10
  • DMUX=2
  • DQ=8
  • SR=12
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 429 418 0 0 0 0 0
bitgen 378 378 0 0 0 0 0
map 385 378 0 0 0 0 0
netgen 1 1 0 0 0 0 0
ngc2edif 7 7 0 0 0 0 0
ngdbuild 407 402 0 0 0 0 0
par 376 376 0 0 0 0 0
trce 374 374 0 0 0 0 0
xps 2 0 0 0 0 0 0
xst 614 588 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/ite_c_overview.htm ( 2 ) /doc/usenglish/isehelp/spartan6/libs_le_acc16.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor PROP_intProjectCreationTimestamp=2015-05-21T17:02:35
PROP_intWbtProjectID=6C1C931C925644C79CFED3D708539C04 PROP_intWbtProjectIteration=5
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_lockPinsUcfFile=changed PROP_xilxBitgStart_IntDone=true
PROP_AutoTop=false PROP_DevFamily=Spartan6
PROP_DevDevice=xc6slx16 PROP_DevFamilyPMName=spartan6
PROP_DevPackage=csg324 PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-3 PROP_PreferredLanguage=Verilog
FILE_UCF=1 FILE_VERILOG=5
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FDC=59 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=2
NGDBUILD_NUM_INV=6 NGDBUILD_NUM_LUT1=24 NGDBUILD_NUM_LUT2=51 NGDBUILD_NUM_LUT3=3
NGDBUILD_NUM_LUT4=18 NGDBUILD_NUM_LUT5=3 NGDBUILD_NUM_LUT6=11 NGDBUILD_NUM_MUXCY=51
NGDBUILD_NUM_OBUF=5 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=45
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FDC=59 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=2
NGDBUILD_NUM_INV=6 NGDBUILD_NUM_LUT1=24 NGDBUILD_NUM_LUT2=51 NGDBUILD_NUM_LUT3=3
NGDBUILD_NUM_LUT4=18 NGDBUILD_NUM_LUT5=3 NGDBUILD_NUM_LUT6=11 NGDBUILD_NUM_MUXCY=51
NGDBUILD_NUM_OBUF=5 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=45
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx16-3-csg324
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5